The present invention relates to through vias, and more specifically, to forming one or more capacitors for a die using through-substrate vias.
Many methods have been suggested in semiconductor manufacturing technology to form 3D-ICs. 3D-IC technology typically demands very thin chips of tens of microns to achieve high density integration. The thin chips are stacked and electrically connected by through substrate vias (TSVs). Efficient use of TSVs permits superior electrical connection throughout a 3D-IC, and can offer other benefits for 3D-ICs. As such, there is a need to more effectively use TSVs for 3D-ICs.